The present invention generally relates to making silicon-on-insulator (SOI) semiconductor wafers, and in particular to a method and a system for gettering impurities from a monocrystalline silicon active layer or film including the use of a phosphorus doping of the SOI wafer.
Recently, semiconductor-on-insulator (SOD) wafers increasingly have been used in very-large scale integration (VLSI) or ultra-large scale integration (ULSI) of semiconductor devices. An SOI wafer typically has a layer of silicon on top of a layer of an insulator material. In an SOI integrated circuit, essentially complete device isolation may be achieved using conventional device processing methods by surrounding each device, including the bottom of the device, with an insulator. One advantage which SOI wafers have over bulk silicon wafers is that the area required for isolation between devices on an SOI wafer is less than the area typically required for isolation on a bulk silicon wafer.
SOI offers other advantages over bulk silicon technologies as well. For example, SOI offers a simpler fabrication sequence compared to a bulk silicon wafer. Devices fabricated on an SOI wafer may also have better radiation resistance, less photo-induced current, and less cross-talk than devices fabricated on bulk silicon wafers. Some limitations still exist with the fabrication of SOI wafers. For example, devices within integrated circuits in SOI wafers are very sensitive to the presence of even minute concentrations of some impurities. For example, metals, such as copper, nickel, silver, gold, or iron, within the active region of a device typically degrade several device characteristics, including leakage current and oxide breakdown voltage. These and other metals rapidly diffuse through silicon at temperatures typical of semiconductor device fabrication processes. These impurities may come to reside in the active region of the SOI wafer from, e.g., contamination during processing from sources such as equipment. The insulation region tends to block impurities from diffusing out of the active layer into the bulk silicon beneath the insulation region. Accordingly, SOI wafers are subject to device and reliability problems caused by the presence of impurities that remain in the active region.
Methods of gettering a silicon substrate are well known. Gettering is used to remove contaminants (usually heavy metals) from regions of the circuit where their presence would degrade device performance. Most all the transition metals, such as gold, copper, iron, titanium, nickel, etc., have been reported as contaminants. It is desirable to reduce the presence of such contaminants in the active regions in order to, for example, reduce reverse junction leakage, improve bipolar transistor gain and increase refresh time in dynamic metal oxide semiconductor (MOS) memories. There are two common forms of gettering: intrinsic gettering and extrinsic gettering.
Intrinsic gettering involves forming gettering sites in the bulk of a semiconductor substrate, generally below the active regions near the frontside surface of the semiconductor substrate. In silicon substrates (wafers) manufactured using the Czochralski (Cz) method, intrinsic gettering generally includes an initial denuding step (for wafers without silicon epitaxial layers) followed by a nucleation step, and then a precipitation step. Denudation, nucleation, and precipitation, in combination, form lattice dislocations in the silicon bulk below the active regions. The dislocations serve to trap heavy metal ions at the dislocation sites, away from the overlying active regions.
Extrinsic gettering, on the other hand, generally involves gettering near the backside surface of a silicon substrate. There are several methods used to perform extrinsic gettering. Two common methods include (i) diffusing phosphorous into the backside surface of a silicon wafer, and/or (ii) depositing polycrystalline silicon (polysilicon) on the backside surface of a silicon wafer. Diffusion processes utilizing extrinsic gettering techniques such as backside phosphorous diffusion and polysilicon deposition are described in Runyan, et al., Semiconductor Integrated Circuit Processing Technology, (Addison-Wesley Publishing Co., 1990), pp. 428-442; and, DeBusk, et al., xe2x80x9cPractical Gettering in High Temperature Processingxe2x80x9d, Semiconductor International, (May 1992) (both of which are herein incorporated by reference for their teachings relating to gettering).
Extrinsic gettering has been applied to the frontside surface of polycrystalline silicon wafers, in which phosphorus doping of contact layers is used to obtain frontside (or topside) gettering of diffused impurities or contaminants.
In SOI wafer technology, however, the use of polysilicon in direct contact with the back of the SOI wafer is not an effective gettering scheme, since the buried oxide layer will act as a diffusion barrier, causing contaminants to become trapped in the SOI film. The use of topside gettering by phosphorus doping of contact layers has not been effective in SOI technology due to the fact that it has been applied late in the fabrication process and thus cannot prevent contamination during earlier stages of the process, and being applied late in the fabrication process, it can only protect accessible portions of the top surface of the circuit, leaving access for contaminants which later migrate from other portions covered by device elements and from which the impurities cannot directly be gettered.
Since SOI wafers do not getter well by known gettering methods due to the presence of the buried oxide, a gettering method applicable to SOI wafers in an early stage of the production of such wafers has been sought.
A method of extrinsic gettering of the surfaces of SOI wafers is the subject of this application. In one embodiment, the method is applied to the frontside, i.e., monocrystalline silicon film, surface of the SOI wafer. In one embodiment, the method is applied to both the frontside and the backside of the SOI wafer.
In one embodiment, the present invention relates to a method of manufacturing a silicon-on-insulator semiconductor wafer, including the steps of:
forming a silicon-on-insulator semiconductor wafer having at least one surface of a monocrystalline silicon film;
subjecting the at least one surface to phosphorus ions to form a doped region of the monocrystalline silicon film doped with phosphorus above an undoped region of the monocrystalline silicon film;
subjecting the wafer to conditions to getter at least one impurity from the undoped region into the doped region;
removing the doped region and a portion of the undoped region from the surface, leaving a substantial portion of the monocrystalline silicon film.
In one embodiment, the phosphorus ions are obtained from a source of phosphorus selected from phosphorus oxychloride, POCl3, phosphine (PH3), trimethyl phosphite, P(OCH3)3, triethyl phosphite, P(OCH2CH3)3, trimethyl phosphate, P(O)(OCH3)3 and triethyl phosphate, P(O)(OCH2CH3)3. In one embodiment, the step of contacting includes formation of a layer of P2O5 on the at least one surface.
In one embodiment, after gettering the layer of P2O5 is removed by etching with an etchant comprising fluorine. In one embodiment, the etchant comprises hydrogen fluoride.
In one embodiment, the portion of the monocrystalline silicon film is removed by chemical mechanical polishing. In one embodiment, the monocrystalline silicon film has an initial thickness in excess of a predetermined final thickness. In one embodiment, removal of the portion of the monocrystalline silicon film leaves a predetermined final thickness of the monocrystalline silicon film. In one embodiment, the portion of the monocrystalline silicon film removed includes the doped region and a portion of the undoped region.
In one embodiment, the present invention relates to a method of manufacturing a silicon-on-insulator semiconductor wafer, comprising the steps of:
forming a silicon-on-insulator semiconductor wafer having at least one surface of a monocrystalline silicon film, wherein the monocrystalline silicon film has an initial thickness in excess of a predetermined final thickness;
subjecting the at least one surface to phosphorus ions to form a doped region of the monocrystalline silicon film doped with phosphorus above an undoped region of monocrystalline silicon film;
subjecting the wafer to conditions to getter at least one impurity from the undoped region into the doped region;
removing the doped region and a portion of the undoped region from the surface, leaving the predetermined final thickness of the monocrystalline silicon film.
In another embodiment, the present invention relates to a method of manufacturing a silicon-on-insulator semiconductor wafer, comprising the steps of:
forming a silicon-on-insulator semiconductor wafer having at least one surface of a monocrystalline silicon film, wherein the monocrystalline silicon film has an initial thickness in excess of a predetermined final thickness, and the monocrystalline silicon film contains an initial concentration of at least one impurity;
subjecting the at least one surface to phosphorus ions to form a doped region of the monocrystalline silicon film doped with phosphorus above an undoped region of the monocrystalline silicon film;
subjecting the wafer to conditions to getter the at least one impurity from the undoped region into the doped region;
removing the doped region and a portion of the undoped region from the surface, leaving the predetermined final thickness of the monocrystalline silicon film, wherein the final thickness of the monocrystalline film contains a concentration of the at least one impurity substantially lower than the initial quantity of the at least one impurity.
Thus, the present invention provides a method for gettering an SOI wafer which addresses and overcomes the limitations of the prior art.